Sixth Annual Symposium on Heterogeneous Integration 🗓 🗺

-- Purpose and Future Vision for Heterogeneous Integration from Global Perspectives, 2 days, 8 Plenary Speakers, Working Group reports ...

… and Heterogeneous Integration Roadmap Annual Meeting: Electronics Resurgence and Renaissance in Science and Technology for Electronics Systems and Products

Pre-Symposium Tutorials: Wednesday, 22 February 2023 (1:00 – 4:30 PM)

Tutorial: “Profiling the Open Chiplets Economy” (1:00 PM)
Tutorial on NIST-sponsored Roadmaps (2:30 PM)
No cost to attend just these Wednesday Tutorials
In-person only (at SEMI Hdqtrs, Milpitas)

Symposium Dates: Thursday & Friday, 23-24 February 2023 (schedule below)

Four Invited Plenary Presentations each morning – Critical Issues in Electronics Resurgence for next decade & beyond
Key messages from groupings of the HIR Chapters (with cross-Working-Group panels)
Cross TWG Collaborations & Dialogues

Registration Fees:

On-Site: $70 (with a half-price rate for students, unemployed, retired, un-supported) — includes lunches
On-Site: $37.50 (for one-day-only registration) — includes lunch
Remote, via WebEx: $40

Download chapters from the Heterogeneous Integration Roadmap (no cost).

Videos from last year’s 2022 Symposium to view.

ADVANCE PROGRAM (subject to slight changes). All times (below) are Pacific Standard Time

Platinum Sponsor

Gold Sponsors

Host

Supporters
SEMI logo

Time (PST)	Speaker	Title
WEDNESDAY, 22 February 2023
1:00 – 2:15 PM	Bapi Vinnakota, OCP/ODSA	Profiling the Open Chiplets Economy
2:30 – 4:30 PM	Reports on NIST Roadmaps	2:20 PM: Melissa Grupen-Shemansky, The SEMI-UCLA Project 2:55 PM: Urmi Ray, 5G/6G MAESTRO Roadmap 3:30 PM: Victor Zhirnov, The SRC MAPT Roadmap
THURSDAY, 23 February 2023
9:00 AM	Dr. William (Bill) Chen, ASE, and co-chair of the IEEE/ASME/SEMI Heterogeneous Integration Roadmap (more)	Welcome and Thanks: Heterogeneous Integration Roadmap Committee “The Heterogeneous Integration Roadmap: Paving the Way for Electronics Resurgence”
9:30 AM	Dr Robert Rudnitsky, NIST Advanced Manufacturing Associate Director (more)	“Update on the CHIPS Research and Development Programs”
10:05 AM	Dr. Xin Wu, Corporate Vice President, Advanced Micro Devices (more)	“Heterogeneous Integration Development – Interdisciplinary Innovations”
10:50 AM	Prof. Madhavan Swaminathan, Director, Center for Heterogeneous Integration of Micro Electronic Systems (CHIMES); Head, EE Department, Pennsylvania State University (more)	“A Roadmap for Heterogeneous Integration for the Next Decade and Beyond – An Academic Perspective”
11:25 AM	Dr Scott Sikorski, Technology Business Development Executive, IBM Corp. (more)	“A Framework for the Organization and Execution of the CHIPS Act-related National Advanced Packaging Manufacturing Program (NAPMP)”
12:00 PM	box lunch
1:00 PM	Group 1 Working Group Presentations	Automotive; SiP and Module; MEMS and Sensors Integration; Single Chip and Multi Chip Integration; Integrated Power Electronics; and Supply Chain 2:30 – 2:30 PM: Cross-TWG dialogue & Q&A
2:40 PM	Group 2 Working Group Presentations	Medical, Health and Wearables; IoT; Mobile; Reliability; Emerging Research Devices 3:30 – 4:00 PM: Cross-TWG dialogue & Q&A
4:00 PM	Kris Erickson, Meta (more)	White Paper: “Additively Manufactured Electronics (AME) for Heterogeneous Integration”
4:30 – 5:00 PM	Town Hall: open dialog; Q&A
FRIDAY, February 24, 2023
9:15 AM	Dr. Bindu Nair, Director of Basic Research, US Department of Defense (more)	“Basic Research in Microelectronics”
10:00 AM	Dr. Wei Chung Lo, Deputy General Director, Electronic and Optoelectronic System Research Laboratories (EOSL), Industrial Technology Research Institute (ITRI)	“AI for Chip Technology and Heterogeneous Integration”. Artificial Intelligence (AI) has become the global big thing of our data-driven era, and “AI on a Chip” is considered as core competence for every smart device in the future … (more)
10:45 AM	Dr Moonsoo Kang, Executive Vice President, Advanced Packaging Business, Device Solution Division, Samsung Electronics (more)	“Heterogeneous Integration Platform for Next Generation Computing (‘Beyond Moore’)”
11:20 AM	Dr. Debendra Das Sharma, Senior Fellow, Intel Corp. (more)	“High-Bandwidth and Low-Latency Standardized Interconnect for an Open Chiplet Ecosystem”
12:00 PM	box lunch
1:00 PM	Group 3 Working Group Presentations	High Performance Computing & Data Centers; 2D-3D Interconnects; Thermal Management; Integrated Photonics; Test; and Co-Design 2:00 – 2:30 PM: Cross TWG dialogue & Q&A
2:40 PM	Group 4 Working Group Presentations	5G, RF and Analog Mixed Signal; Simulation; Aerospace & Defense; WLP (Fan-in & Fan Out); Materials & Emerging Research Materials; and Cyber Security 3:40 – 4:10 PM: Cross-TWG dialogue & Q&A
4:10 PM	Dr. Luu Nguyen, PsiQuantum, IEEE Quantum Initiative Co-Chair, IEEE Future Directions (more)	White Paper: “Packaging Challenges in Quantum Computing”
4:30 – 5:00 PM	Town Hall: open Q&A; small-group discussions; 2023 plans