Silicon Valley Area Chapter

(SCV, SF, OEB)

Next Generation Computing in the Era of Chiplets (3 talks) 🗓

-- 2.5D, 3D, memory challenges, thermal management, power delivery, heterogeneous integration, open standards ...

Organized by the Nanotechnology Council
register Speakers: Joshua Rubin (IBM); Srikanth Rangarajan (Binghamton University); Si- Ping Gao (Nanjing University of Aeronautics and Astronautics)
Three talks (details below):
    — “Memory Challenges and Solutions for Chiplets”
    — “Advanced Thermal Management of Next-Generation of High-Performance Computing”
    — “Power Delivery of Heterogeneous Integration: Challenges and Opportunities”

Meeting Date: Wednesday, April 2, 2025
Time: Presentations at 8:30 AM (PST)
Cost: none
More information: LINK
Access to live webinar: via ZOOM Link     (Save in your Calendar)

Summaries of talks:

“Memory Challenges and Solutions for Chiplets”, Joshua Rubin, Senior Engineer, IBM
ABSTRACT – The AI hardware industry landscape is full of diverse approaches to hardware design, ranging from large SoCs to chipletized systems based on both 3D and 2.xD packaging. Even within the chipletized systems the chiplet architecture can vary greatly. Most current solutions are based on silicon designed by a single hardware vendor. In this workshop we will review the AI hardware industry landscape and compare the various approaches. Furthermore, we will explore a vision for disaggregation of IBM’s recently announced Spyre accelerator SoC, designed by IBM Research. We will look at how an AI chiplet in combination with other chiplets in an open chiplet ecosystem would enable creation of performant chiplet architectures for domain-specific applications.

“Advanced Thermal Management of Next-Generation of High-Performance Computing”, Prof. Srikanth Rangarajan, School of System Science and Industrial Engineering, Binghamton University
ABSTRACT – As high-performance computing (HPC) systems continue to evolve, the challenge of managing heat generated by increasingly powerful and compact electronic components has become paramount. This talk explores cutting-edge thermal management solutions that are paving the way for the next generation of HPC systems. We will discuss innovative approaches such as single- and two-phase liquid cooling. The presentation will also cover advancements in phase change materials for managing transient heat loads. Additionally, the talk will examine the integration of artificial intelligence and machine learning into thermal management systems, enabling real-time temperature monitoring and predictive analysis for optimal cooling strategies. The talk will highlight how these technologies are not only addressing current thermal challenges but also enabling the development of more powerful, efficient, and reliable HPC systems for the future.

“Power Delivery of Heterogeneous Integration: Challenges and Opportunities”, Prof. Si-Ping Gao, Nanjing University of Aeronautics and Astronautics (NUAA)
As semiconductor design continues to evolve, chiplet technology has emerged as a promising solution to the limitations of traditional monolithic integrated circuits [1]. The shift towards chiplet-based heterogeneous integration (HI) offers flexibility, scalability, and improved manufacturing yields. However, this new approach presents significant challenges in power delivery. Efficient power delivery in HI systems is crucial to maintaining performance and reliability across multiple, independently manufactured and assembled die [2]. In this paper, we explore the key issues surrounding power delivery in HI architectures, including power integrity, voltage regulation, interconnect design, and thermal management [3]. We also propose innovative power delivery network (PDN) strategies tailored to the specific needs of chiplet designs. Our findings demonstrate how advanced PDN designs can mitigate power-related issues while supporting the energy efficiency, performance, and scalability demands of future semiconductor systems. This talk provides valuable insights for industry professionals and academics aiming to address the power delivery challenges inherent in the next generation of chiplet-based HI technologies.

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