Silicon Valley Area Chapter

(SCV, SF, OEB)

Fifth Symposium on HI: Speakers

Ajit Manocha Ajit Manocha, President & CEO, SEMI
• Had the rare distinction of being inducted into two Hall of Fames
      • Silicon Valley Engineering Council –2020
      • VLSI Research –2021
• VLSI Research “All Star of the Semiconductor Industry” for 2019
• 4+ decades of a sterling career in the semiconductor industry
      • CEO at GlobalFoundries, Top 3 pure-play foundry
      • Chairman of the Semiconductor Industry Association
      • EVP of Worldwide Operations at Spansion
      • EVP and Chief Manufacturing Officer at Philips/NXP
• Research Scientist at the legendary Bell Laboratories
• 5+ years on US President’s committees (2012-2017) –
      • “Advanced Manufacturing Partnerships”
      • President’s Council of Advisors on Science and Technology (PCAST)
Willy Shih, Harvard Business School.
Prof Willy Shih is the Robert and Jane Cizik Professor of Management Practice in Business Administration at the Harvard Business School in Boston, Massachusetts. He is part of the Technology and Operations Management Unit, and he teaches in the MBA and Executive Education Programs.
Willy’s expertise is in manufacturing, supply chains, and product development. He has written or co-authored numerous cases and teaching materials in a wide range of industries. His book, “Producing Prosperity – Why America Needs a Manufacturing Renaissance,” co-authored with Gary Pisano, has called attention to the link between manufacturing and innovation. His paper on the challenges of reshoring was featured in the Fall 2014 issue of the Sloan Management Review, and his Summer 2020 paper, “Is it time to Rethink Global Supply Chains” was the most popular article of the year.
Prior to coming to HBS in 2007, Willy spent 28 years in industry. Reporting to him have been manufacturing and distribution operations around the world, as well as global sales and marketing operations.

David Mountain, Dept of Defense
Dr. David J. Mountain is the Senior Technical Director of the Laboratory for Physical Sciences at Research Park, a Department of Defense research lab in Catonsville, MD. The LPS-RP mission is to collaborate with industry, academia, and the government to drive innovative research that will improve advanced computing systems for a range of mission applications including cybersecurity, cryptanalysis, and complex data analytics. His responsibilities include research activities in neuromorphic and probabilistic computing, advanced modeling and simulation, novel computer architectures, energy efficiency, productivity, and resilience.
He received a BS in Electrical Engineering from the University of Notre Dame, an MS in Electrical Engineering from the University of Maryland, College Park, and a PhD in Computer Engineering from the University of Maryland, Baltimore County. Dr. Mountain’s personal research projects have included radiation effects studies, hot carrier reliability characterization, chip-on-flex process development utilizing ultra-thin circuits, and neuromorphic computing. He has been actively involved with 3D electronics research for 30 years. He is the author of more than three dozen technical papers, has been awarded nine patents, and is a Senior Member of the IEEE.
Todd YoungkinTodd Younkin, President & CEO, Semiconductor Research Corporation (SRC)
In August of 2020, Dr. Todd Younkin became the CEO of SRC, where he leads a ~US$90M/year global research agenda supported by ~3k academic and industrial researchers, 26 international companies, and 3 U.S. government agencies. Shortly thereafter, SRC released its 2030 Decadal Plan for Semiconductors, where it identified the five “seismic shifts” shaping the future of information and communication technologies (ICT). Working closely with SIA, SRC has called for greatly increased federal investments throughout the decade to establish a smarter pipeline for semiconductor R&D, aligned to SRC’s Decadal Plan. Todd’s excited by the worldwide call for a renewed investment in semiconductor materials, hardware, and design, as well as the equally important calls for an emphasis on education and workforce development and our need for environmental sustainability. Only by investing in a bright, collective future, will we rise to the meet the opportunities presented by the next industrial revolution.
Prior to becoming SRC’s CEO, Dr. Younkin’s research and development experience spanned Intel’s 0.18um to 5nm nodes with technical contributions in novel materials, nanotechnology, integration, advanced lithography, and integrated photonics. From 2010 to 2013, Dr. Younkin was on assignment to IMEC’s advanced lithography program to mature both EUV lithography (EUVL) and the Directed Self-Assembly (DSA) of block copolymers (BCPs) and return the technology to Intel in Portland, OR. In 2018, Dr. Younkin engineered, launched, and led all programmatic aspects of the 5-year, $250 million JUMP research initiative, led by the Semiconductor Research Corporation (SRC) in collaboration with DARPA and their Electronics Resurgence Initiative (ERI). JUMP has 6 multi-university, multi-disciplinary innovation centers that bring together 140 faculty, 701 students, and 387 industrial engineering liaisons on 172 research tasks at 32 universities. It emphasizes the advancement of Materials, Electrical Engineering, and Computer Engineering to secure continued U.S. thought leadership in semiconductors. Dr. Younkin holds a Ph.D. from the California Institute of Technology in Pasadena, California. He completed his Bachelor of Science at the University of Florida in Gainesville, Florida.
Thomas Kazior, PhD, IEEE Fellow, program manager in the Microsystems Technology Office, DARPA
Dr. Thomas E. Kazior joined DARPA in July 2020 as a program manager in the Microsystems Technology Office (MTO). His research interests include semiconductor device design, fabrication and integration processes including wide-bandgap (WBG) and ultra-wide bandgap (UWBG) materials and devices for microwave/millimeter-wave/sub-millimeter-wave applications, device level heterogeneous integration, and 3D heterogeneous integration (HI) of silicon and compound semiconductor and other non-silicon devices for RF arrays.
Prior to joining DARPA, Kazior was a senior principal fellow at Raytheon Company’s Integrated Defense Systems. At Raytheon, he led teams on the development of compound semiconductor (gallium arsenide, indium phosphide, and gallium nitride) material, device, and circuit technology for microwave and millimeter wave applications and the HI of these devices with silicon. To support research and technology in this area, he served on the Science Advisory Board (SAB) for the Semiconductor Research Corporation’s (SRC) Focus Center Research Program (FCRP); the Semiconductor Technology Advanced Research network (STARnet); and Joint University Microelectronics Program (JUMP); participated in the International Technology Roadmap for Semiconductors (ITRS); and the IEEE Heterogeneous Integration Roadmap (HIR).
Kazior received a Bachelor of Science degree in electrical engineering from Tufts University and a Doctor of Philosophy degree in material science and engineering, specializing in electronic materials, from the Massachusetts Institute of Technology. Kazior has co-authored more than 100 publications, contributed and invited conference papers, and a book chapter on compound semiconductor and heterogeneous integration technology. He also has more than 20 patents in semiconductor fabrication technology. Kazior is an IEEE Fellow.
Nicky Lu, CEO & Founder Etron
Dr. Nicky Lu is the Chairman, CEO & Founder, Etron Technology, Inc. and Managing Board Director, Taiwan Semiconductor Industry Association (TSIA). As a researcher, design architect, entrepreneur and chief executive, Dr. Lu has dedicated his career to the worldwide IC design and semiconductor industry. He also co-founded several other high-tech companies including Ardentec, Global Unichip and GTBF Corporations.
Dr. Lu worked for the IBM Research Division and then the Headquarters from 1982 to 1990 and won numerous IBM recognition awards, including an IBM Corporate Award. He co-invented and pioneered a 3D-DRAM technology, known as the Substrate-Plate Trench-Capacitor (SPT) cell, along with its associated array architecture, which has been widely used by IBM and its licensees from 4Mb to 1Gb DRAMs and embedded DRAMs over hundreds of billions dollars.
Dr. Lu received his B.S. in Electrical Engineering from National Taiwan University and M.S. and Ph.D. in EE from Stanford University. He holds over 30 U.S. patents and has published more than 60 technical papers. He serves as Managing Board Director and was Chairman of TSIA, as Board Member of Global Semiconductor Alliance (GSA) and GSA’s General Chair (2009 to 2011), and Chairman of WSC (World Semiconductor Council) from 2014 to 2015. He is an IEEE Fellow, the recipient of the IEEE 1998 Solid-States Circuits Award, a member of NAE (National Academy of Engineering of USA), and received of a SEMI Industry Contribution Award in 2017.
Jose Schutt-Aine José Schutt-Ainé, University of Illinois Urbana-Champaign
José E. Schutt-Ainé is a Professor of Electrical and Computer Engineering Department at the University of Illinois. His current research interests include the study of signal integrity and the generation of computer-aided design tools for high-speed digital systems. He is an IEEE Fellow, EPS Distinguished Lecturer, and served as Co-Editor-in-Chief of the IEEE Transactions on Components, Packaging and Manufacturing Technology (T-CPMT) from 2007 to 2018.
Albert Heuberger Albert Heuberger, Executive Director, Fraunhofer Microelectronics Group
Prof. Dr. Albert Heuberger is Executive Director of the Fraunhofer Institute for Integrated Circuits. Since 2011, he has held the Chair of Information Technologies with a focus on Communication Electronics at the University Erlangen-Nürnberg. His research interests are communication technologies for Internet of Things and 5G communications. He oversees numerous R&D activities in the area of cognitive sensor technologies for mobility, industrial control and health applications.
Since January 2020, Prof. Heuberger has been the new spokesman of the Fraunhofer Group for Microelectronics’ board of directors as well as the chairman of the steering committee of the Research Fab Microelectronics Germany (FMD).
William Chen (Bill) holds the position of ASE Fellow & Senior Technical Advisor at ASE Group. Prior to joining ASE, he was Director at the Institute of Materials Research & Engineering (IMRE) in Singapore, following a distinguished career at IBM Corporation. Bill is a past President of the IEEE Electronics Packaging Society. He is a Life Fellow of IEEE and a Fellow of ASME. He received the ASME InterPACK Achievement Award in 2007. In 2018, he received the IEEE Electronics Packaging Field Award, recognizing his contribution to electronic packaging, from research & development through industrialization.
Bill chairs the Heterogeneous Integration Roadmap initiative, co-sponsored by 3 IEEE Societies (EPS, EDS & Photonics) together with SEMI & ASME Electronics & Photonics Packaging Division.
Ravi Mahajan is an Intel Fellow responsible for Assembly and Packaging Technology Pathfinding for future silicon nodes. Ravi also represents Intel in academia through research advisory boards, conference leadership and participation in various student initiatives. He has led Pathfinding efforts to define Package Architectures, Technologies and Assembly Processes for multiple Intel silicon nodes including 90nm, 65nm, 45nm, 32nm, 22nm and 7nm silicon. Ravi joined Intel in 1992 after earning his Ph.D. in Mechanical Engineering from Lehigh University. He holds the original patents for silicon bridges that became the foundation for Intel’s EMIB technology. His early insights have led to high-performance, cost-effective cooling solutions for high-end microprocessors and the proliferation of photo-mechanics techniques for thermo-mechanical stress model validation. His contributions during his Intel career have earned him numerous industry honors, including the SRC’s 2015 Mahboob Khan Outstanding Industry Liaison Award, the 2016 THERMI Award from SEMITHERM, the 2016 Allan Kraus Thermal Management Medal & the 2018 InterPACK Achievement award from ASME, the 2019 “Outstanding Service and Leadership to the IEEE” Awards from IEEE Phoenix Section & Region 6 and most recently the 2020 Richard Chu ITherm Award and the 2020 ASME EPPD Excellence in Mechanics Award. He is one of the founding editors for the Intel Assembly and Test Technology Journal (IATTJ) and currently VP of Publications & Managing Editor-in-Chief of the IEEE Transactions of the CPMT. He has long been associated with ASME’s InterPACK conference and was Conference Co-Chair of the 2017 Conference. Ravi is a Fellow of two leading societies, ASME and IEEE.
Dr. Bill Bottoms received a B.S. degree in Physics from Huntington College in Montgomery, Alabama in 1965, and a Ph.D. in Solid State from Tulane University in New Orleans in 1969 and is currently Chairman of Third Millennium Test Solutions. He has worked as a faculty member in the department of electrical engineering at Princeton University, manager of Research and Development at Varian Associates, founding President of the Semiconductor Equipment Group of Varian Associates and general Partner of Patricof & Co. Ventures.
Dr. Bottoms has participated in the start up and growth of many companies through his venture capital activity and through his own work as an entrepreneur. He has served as Chairman and CEO of many companies both public. Some of his current responsibilities include:
• Emeritus Member of the Board of Tulane University
• Co-Chair of the Heterogeneous Integration Roadmap
• Chairman of the SEMI’s Awards Committee
• Member of the Board of MIT’s Microphotonic Center
• Chairman of Fluence Analytics
• Chairman of the Technology Board of Tulane’s POLYRMC center.
• Chairman of Third Millennium Test Solutions
Dr. David Harame Harame is the Director of EPDA, Test & Packaging, and Process Development for the Research Foundation SUNY Polytechnic Institute and the Chief Operating Officer for AIM Photonics. David is responsible for the organization’s Photonic technologies, Electronic Photonic Design Automation process design kits, and Test, Assembly and Packaging (TAP) operations in Albany and Rochester NY. He is an IEEE Fellow and has held numerous other industry leadership roles throughout his career.