April 15, 2010
Speaker: Prof. Vojin Oklobdzija (IEEE Distinguished Lecturer, SSCS)
Title: Energy-Efficient Design of Digital Circuits
Please note special location: Qualcomm Santa Clara, Building B, 3165 Kifer Road Santa Clara (map)
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Abstract:
Techniques for designing and optimizing digital circuits have for a long time been driven by performance. Power is now the limiting factor to performance. Logical Effort technique helps to determine transistor sizes for speed as an objective function. However, it neglects energy issues and fails to provide a guideline when designing with power budget. Other techniques have been presented which opportunistically improve power, or degrade performance to reduce power. These approaches do not directly address the true concern of digital designers, which is obtaining the minimal energy for a given performance. How to make energy-delay trade-offs for the optimal design point is neither well understood nor well defined. Design space is bound by maximally achievable speed and minimal achievable power. This presentation addresses the factors impacting optimization of digital circuits, and a framework for the optimal sizing, comparison, and analysis of energy-efficient designs.
Speaker Bio:
Vojin G. Oklobdzija, is IEEE Fellow, Distinguished Lecturer of the IEEE Solid-State Circuits Society, Vice-President of IEEE CAS and Member of the IEEE CAS Board of Governors. He received Dipl. Ing. degree from the School of Electrical Engineering, University of Belgrade in 1971, and Ph.D. from the UCLA in 1982. During his PhD he worked at Xerox Corp. Microelectronic division and was involved in early workstation development: Xerox Alto.
From 1982 to 1991 he was at the IBM Thomas J. Watson Research Center, where he made contributions to the development of RISC processors, super-scalar and supercomputer design. In the course of this work, he obtained several patents, the most notable one on register renaming, which enabled a new generation of modern computers.
From 1988 to 1990 he was IBM visiting faculty member at the University of California at Berkeley, from 1991-2006 professor of computer engineering at the University of California Davis, 2006-2007 Chair Professor at Sydney University and currently Professor at the University of Texas in Dallas. Prof. Oklobdzija actively served as a consultant to: Sun Microsystems, Bell Laboratories, Texas Instruments, Hitachi, Fujitsu, SONY, Intel, Samsung and Siemens Corp. (where he was a principal architect for the Infineon TriCore processor). Dr. Oklobdzija has provided litigation consulting and expert witness services to major legal firms in USA and abroad including: Townsend and Townsend, Arent Fox, Kellogg Huber, Dechert LLP, DLA Piper US LLP and BLB&G. He holds 15 U.S., 6 European, 6 Japanese, 6 international and 2 other patents pending.
Prof. Oklobdzija is serving on the Editorial Board of IEEE MICRO and publishing board of Taylor-Francis, IEEE Fellow Committee, and numerous other IEEE committees. He served as the Associate Editor of IEEE Transaction on Computers from 2000-2006, IEEE Transactions on VLSI from 1995-2003, IEEE Transaction on Circuits and Systems II and Journal of VLSI Signal Processing, the ISSCC program committee from 1996 to 2003 and again in 2007, First Asian ASSCC, International Symposium on Low-Power Design, Computer Arithmetic, ICCD, PATMOS and numerous other conference committees. Currently he is General Chair for the International Symposium on Low-Power Design, ISLPED 2010 and 20th Int’l Symposium on Computer Arithmetic, ARITH-20. He was a General Chair of the ARITH-13 (1997), DCAS-2008, IASTED Conference on Circuits, Signals and Systems (2006), Technical Program Chair for ISLPED 2008 and Track Chair for ICCD 2008. Prof. Oklobdzija has published 170 papers, 6 books and dozen of book chapters in the areas of circuits and technology, computer arithmetic and computer architecture. His book “Computer Engineering” won Outstanding Academic Title award, out of 22,000 titles considered and is currently in second edition. He has given over 200 invited talks and short courses in the USA, Europe, Latin America, Australia, China and Japan.
As Emeritus Professor of the University of California he directs ACSEL laboratory which is involved in digital circuits optimization for low-power and ultra low-power, high-performance system design and sensor nodes.
(for further information please see: http://www. acsel-lab.com )
SCV SSCS Technical meetings are typically held on The THIRD Thursday of each month.
This month’s meeting will be held at Qualcomm Santa Clara, Building B, 3165 Kifer Road Santa Clara CA (map)
Refreshments are provided at 6:00 PM and the talk typically begins at 6:30 PM.
Donations requested to partially cover food cost.
The talks are open to everyone, feel free to join us even if you are not an IEEE member yet.
