Our IEEE Santa Clara Valley Solid State Circuits Society Chapter was the first IEEE SSCS Chapter established in the world in 1997. Jonathan David conducted the petition drive and served as the first Chapter Chair.

Our web site is one of the most visited of all IEEE Chapter sites in the world. In 2004, the chapter organized 11 technical meetings with a total attendance of over 900 participants. For this performance, the chapter received the “IEEE 2004 Solid State Circuits Society Chapter of the Year Award,” which was presented to Dan Oprica at ISSCC in February 2005.

SCV SSCS Technical meetings are typically held on The THIRD Thursday of each month at:

Texas Instruments Silicon Valley Auditorium
2900 Semiconductor Dr., Santa Clara, CA 95051
Directions and NSC Map

Refreshments are provided at 6:00 PM and the talk typically begins at 6:30 PM.
Donations requested to partially cover food cost.

The talks are open to everyone, feel free to join us even if you are not an IEEE member yet.

For email reminder, send email to the ssc-chpt-scv mailing list (listserv@listserv.ieee.org).
Type in the BODY of the email: subscribe ssc-chpt-scv FirstName  LastName
example: subscribe ssc-chpt-scv  John  Doe

To unsubscribe:
Please send email to the ssc-chpt-scv mailing list (listserv@listserv.ieee.org).
Type in the BODY of the email: signoff ssc-chpt-scv
do not type anything in the subject line.

We appreciate guest speakers contributing to SSCS SCV with new concepts and technologies. If you are interested in presenting at our meetings, please contact any of the officers listed. We thank Texas Instruments (with the help of Mr. Jim Wieser, Chief Technologist, Strategic Technology Group, Texas Instruments) for providing the ideal venue for the monthly meetings. We also thank Scott Kraemer(A/V Support Specialist, Texas Instruments) for his assistance. We also thank the SSCS SCV officers for their tireless work in keeping this chapter running smoothly.


Santa Clara Valley Chapter of the Solid State Circuits Society


October 2021

Next Meeting

“Automatic Generation of SystemVerilog Models from Analog/Mixed-Signal Circuits: a Pipelined ADC Example” – Prof. Jaeha Kim, Seoul National University (SNU)

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