Everything You Wish to Know about Memories But Are Afraid to Ask

 

 

Speaker: Leon Chua, University of California, Berkeley

Time: Feb. 9th (Thursday) evening 6.30 pm-8.30pm.

Title: Everything You Wish to Know about Memristors But Are Afraid to Ask

This lecture was part of the SSCS Webinar Series and can be accessed by IEEE Members here.

Abstract:

The memristor was predicted by Dr. Leon Chua in 1971 as the basic missing fourth element of IC’s. It made headlines when a team at HP labs demonstrated it in 2008. Memristance is now being used for memories and explored for low-energy brain-like computing. This talk will answer many of the things you’d like to know, but haven’t had the chance to ask. For instance, what made Dr. Chua think that there was a missing circuit element? Why is it needed to complete the circuit element “universe”?  What signature distinguishes it from the classic circuit elements? Can the memristor store analog data? Why are brains made of memristors? You’ll also walk away with the knowledge to tell whether the unexpected behavior in your device is an exciting memristive effect

 Bio:

 Leon Chua Often introduced as the father of the tiger mom, Leon Chua is the inventor of the memristor, the Cellular Nonlinear Network, and the Chua Circuit. He is also known as the father of Nonlinear Circuit Theory. A professor of Electrical Engineering and Computer Sciences from UC Berkeley since 1971, and an IEEE Fellow since 1975, Dr. Chua has been conferred with 15 Honorary Doctorates from major universities worldwide. He had received numerous awards, including the first IEEE Kirchhoff Award, the Terman Award, and is both a Guggenheim Fellow, and a European Union Marie-Curie Fellow. He is a member of the European academy of Sciences, and a foreign member of the Hungarian Academy of Science.

Welcome

Santa Clara Valley Chapter of the Solid State Circuits Society

Calendar

September 2021
M T W T F S S
 12345
6789101112
13141516171819
20212223242526
27282930  

Next Meeting

“Automatic Generation of SystemVerilog Models from Analog/Mixed-Signal Circuits: a Pipelined ADC Example” – Prof. Jaeha Kim, Seoul National University (SNU)

Search Previous Events