Selected Analog Design Topics


Time: August 20th (Thursday) evening 4.30 pm-8.00pm.
First Speaker: Dr. B.K. Ahuja

Title: Evolution of High Speed Analog Front End ICs

Today’s SOCs for consumer and communication applications include sophisticated Analog Front Ends to interface with physical medium for sensing, signal conversion, processing, storage and delivery. The talk will cover evolution of analog functionality and design techniques used over last 3 decades using CMOS technologies from 5um down to 16nm. Analog Front end ICs for Telecom CODEC/Modems, Video AFE, 10GBASET LAN AFE and Modem for high speed communications will be discussed. Advances in design techniques for commonly used analog building blocks will also be noted along with challenges for future.


Bhupendra K. (BK) Ahuja received his BSEE from the Indian Institute of Technology, Kanpur, India and his MS and PhD degrees in Electronics Engineering from Carleton University, Ottawa, Canada. He started his professional career at Bell Laboratories, NJ, designing industry first CMOS Codec/filter IC. Subsequently, he worked at several bay area public and startup companies like Intel, NeoMagic, Intersil, Teranetics, Nvidia and now at Ikanos in senior Technical Management roles. His design experiences span Telecom ICs, DSL modem, Digital Camera AFE, 10GBASET AFE, SERDES, PLLs and Precision Analog ICs. BK has published over 25 technical papers and holds numerous patents in the area of Analog IC designs. BK is the inventor of “Ahuja Compensation” a novel frequency compensation technique widely used for CMOS operational amplifiers. In 2006, he was elected IEEE Fellow for his contributions to Integrated Circuits for Telecommunications and Computer Communications Systems.



Second Speaker: Dr. Mike Perrott

Title: Fast and Accurate System Level Simulation of Time-Based Circuits

Time-based circuits encode analog information in the edge times of binary-valued signals. These circuits benefit from the fast transition times and high digital density offered by advanced CMOS processes, and offer a path to using digital circuits to perform analog processing of signals. Recent examples of such circuits include digital phase-locked loops and VCO-based analog-to-digital converters. In this talk, we will present techniques for achieving fast and accurate system level simulation of time-based circuits using the freely available tools of CppSim and VppSim. These tools incorporate an efficient protocol for encoding edge
time information, and allow seamless co-simulation of Verilog and C++ modules along with nodal analysis of linear networks with switches. In addition to discussing key techniques employed by these tools, a software demonstration will be provided with examples including phase-locked loop, switched capacitor, and power conversion circuits.
Attendees can download the software at . This would help them to experiment with the software before the talk also.


Michael H. Perrott received the B.S. degree in Electrical Engineering from New Mexico State University, Las Cruces, NM in 1988, and the M.S. and Ph.D. degrees in Electrical Engineering and Computer Science from Massachusetts Institute of Technology in 1992 and 1997, respectively. From 1997 to 1998, he worked at Hewlett-Packard Laboratories in Palo Alto, CA, on high speed circuit techniques for Sigma-Delta synthesizers. In 1999, he was a visiting Assistant Professor at the Hong Kong University of Science and Technology. From 1999 to 2001, he worked at Silicon Laboratories in Austin, TX, and developed circuit and signal processing techniques to achieve high performance clock and data recovery circuits. He was an
Assistant and then Associate Professor in Electrical Engineering and Computer Science at the Massachusetts Institute of Technology from 2001 to 2008. He was with SiTime Corporation from 2008 to 2010, where he developed key technology for MEMS-based oscillators. He was a professor at Masdar Institute in Abu Dhabi from 2011 to 2013, where he focused on low power, mixed-signal circuits for health monitoring. He is currently working on next generation MEMS-based gyros and microphones at Invensense in Boston, MA.


Santa Clara Valley Chapter of the Solid State Circuits Society


September 2021

Next Meeting

“Automatic Generation of SystemVerilog Models from Analog/Mixed-Signal Circuits: a Pipelined ADC Example” – Prof. Jaeha Kim, Seoul National University (SNU)

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