Solid State Circuits Society

June 1st, 2022

Wednesday June 1, 2022, 6:00-7:00PM
Title:  “Global Architectural Optimization of 100+Gbps Wireline Transceivers” – Tony Chan Carusone, Chief Technology Officer, Alphawave IP, Professor, University of Toronto
Location: Hybrid Seminar (in-person/online)
Registration Link: (In-Person Register Here, Online Register Here)

Date & Time: Wednesday June 1, 2022, 6:00-7:00PM

Location: Hybrid Seminar (in-person/online). In-person:

Alphawave IP

1730 N First St, San Jose CA, 95112

Suite 650.

For in-person attendance, obtain a ticket through the in-person event. For online attendance, obtain a ticket through the online event. The Zoom link will be accessed through your ticket.

Registration Link (Required) : In-Person Register Here, Online Register Here

Registration Fee: FREE, Donation Requested

IEEE SSCS members: FREE

IEEE members – $2 donation

Non-members – $5 donation

Abstract:

Progress in computation and communication is increasingly bottlenecked by integrated circuit I/O. Above 100Gbps, technology scaling favors transceivers comprising analog front-ends, data converters, and a large custom DSP. Advanced DSP allows us to overcome performance limitations that may arise in analog front ends is described.  However, subtle interactions between the analog front-end and digital equalization, timing recovery, and forward error correction impact BER, and thus transceiver design, significantly.  For example, whereas existing adaptation methods minimize mean-squared error or pre-FEC BER, these settings do not necessarily correspond to the minimum post-FEC BER. Advanced optimization methods are necessary to identify optimal architectural tradeoffs.

Bio:

Tony Chan Carusone has been a faculty member at the University of Toronto since completing his Ph.D. there in 2002.  He has co-authored eight award-winning papers on chip-to-chip and optical communication circuits, ADCs, and clock generation.  He has also been a consultant to industry since 1997. He is currently the Chief Technology Officer of Alphawave IP in Toronto, Canada.

Dr. Chan Carusone was a Distinguished Lecturer for the IEEE Solid-State Circuits Society 2015-2017 and served on the Technical Program Committee of the International Solid-State Circuits Conference from 2015-2021.  He co-authored the latest editions of the classic textbooks “Analog Integrated Circuit Design” along with D. Johns and K. Martin, and “Microelectronic Circuits” along with A. Sedra and K.C. Smith. He has served as Editor-in-Chief of the IEEE Transactions on Circuits and Systems II: Express Briefs, an Associate Editor for the IEEE Journal of Solid-State Circuits, and is now Editor-in-Chief of the IEEE Solid-State Circuits Letters.  He is a Fellow of the IEEE.

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