Solid State Circuits Society

January 15 2009

Our speaker was Ken Kundert, (Designer’s Guide Consulting), and the topic of his presentation was  ” Analog Verification”

Abstract
Verification is becoming widely recognized as one of the most important issues when designing large complex analog and RF mixed-signal circuits. As a result, design methodologies are starting to change. This change mirrors a change that occurred in digital design 10-15 years ago.

In this presentation I will show why the problem has become so significant, and what people are doing to control the problem. This presentation is targeted for design management, design engineers, and verification engineers. It outlines a practical and proven methodology for performing the complete functional verification of the most complex analog SoCs using examples to illustrate the essential points. This methodology not only assures that the implementation is functionally consistent with the specification, but it also produces a high-level Verilog or VHDL model that is shown through exhaustive transistor-level testing to be functionally equivalent to the implementation. Use of this methodology also leads naturally to the adoption of a top-down design style and aids performance verification.

Biography
Dr. Ken Kundert is President and co-founder of Designer’s Guide Consulting, a company that is guiding the industry towards adoption of analog verification. Previously, he worked at Cadence and HP, where he created Spectre, SpectreRF, Verilog-A/MS and HP’s (now Agilent’s) harmonic balance simulator. He has written three books on circuit simulation and modeling and created “The Designer’s Guide Community” website. He received his Ph.D. in Electrical Engineering from the University of California at Berkeley in 1989. Ken was elevated to the status of IEEE Fellow in January 2007 for contributions to simulation and modeling of analog, RF, and mixed-signal circuits.

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