IEEE Santa Clara Valley Chapter
November 10, 2008
Short Course: Architecture and Circuit Design for High-Speed Pipelined A/D Converters
Prof. Boris Murmann, Stanford University
* Date: Monday, November 10, 2008
* Time: 5.30 PM – 9.00 PM
* Registration and Refreshments: 5.30 PM- 6.00 PM
* Lecture: 6.00 PM- 8.30 PM
* Question and answer session: 8.30 PM – 9.00 PM
Abstract:
This lecture discusses the design and implementation of pipelined ADCs
using a top-down approach, ranging from an architecture level analysis
to transistor level implementation details. Specific topics include:
(1) Basic operation principle, (2) Redundancy and digital calibration
techniques, (3) Error and noise budgeting; pipeline stage scaling and
choice of per-stage resolution, (4) Transistor level circuit
implementation, including gm/ID-based design of operational
transconductance amplifiers (5) low power techniques such as OTA
sharing and SHA-less front-ends, and (5) performance survey; recent
trends and developments in research.
Bio:
Boris Murmann is an Assistant Professor in the Department of
Electrical Engineering, Stanford, CA. He received the Ph.D. degree in
electrical engineering from the University of California at Berkeley
in 2003. From 1994 to 1997, he was with Neutron Microlectronics,
Hanau, Germany, where he developed low-power and smart-power ASICs in
automotive CMOS technology. Dr. Murmann’s research interests are in
the area of mixed-signal integrated circuit design, with special
emphasis on data converters and sensor interfaces. He currently serves
as a member of the International Solid-State-Circuits Conference
(ISSCC) program committee.
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