IEEE Santa Clara Valley Chapter
August 16, 2007
Our speaker was Mr. Amirpouya Kavousian, M.S.E.E., B.S.E.E. (Stanford University), and the topic of his presentation was ” A Digitally Modulated Polar CMOS PA with 20MHz Signal BW. “
Abstract
The advent of high-bandwidth, highly spectral-efficient communication systems, such as IEEE 802.11g, has imposed tremendous challenges on power amplifier design. Since power amplifiers are often the most power-consuming block in a wireless system, their efficiency can have a determining impact on the battery lifetime of a system. However, the high linearity required of current and emerging wireless systems has typically mandated the use of highly linear low-efficiency traditional class-A designs. This talk presents a CMOS RF power amplifier that employs a digital polar architecture to improve the overall power efficiency while providing the linearity required of IEEE 802.11g systems. An experimental prototype of the polar power amplifier, integrated in a 0.18um CMOS technology, occupies a total die area of 1.8mm2, operates at 1.6GHz and achieves 6.7% PAE with -26.8dB EVM while delivering 13.6dBm linear output power.
Biography
Amirpouya Kavousian was born in Tehran, Iran in 1979. He received the B.S. degree in electrical engineering from Sharif University of Technology, Tehran, Iran in 2001 and the M.S. degree in electrical engineering from Stanford University, Stanford, CA, in 2003, where he is working toward the Ph.D. degree in electrical engineering. His doctoral research focuses on the design of CMOS RF power amplifiers. He recently joined Quantenna Communications, Sunnyvale, CA as a design engineer.
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