Solid State Circuits Society

August 17, 2006

Our first speaker speaker is   Mr. Bruno W. Garlepp, M.S.E.E., B.S.E.E. (Rambus), and the topic of his presentation is ” A Monolithic Low-Bandwidth Jitter-Cleaning PLL with Hitless Switching for SONET/SDH Clock Generation. “

Abstract

A single-chip jitter-cleaning PLL with hitless switching is presented. By utilizing the mostly-digital phase build-out technique, the steady-state output phase step after switching is bounded within 200ps. At the loop bandwidth of 800Hz, the maximum output phase-transient slope is <4.5ns/ms. The jitter generation is 0.8ps in the OC48 band and 0.4ps in OC192 band. The 16.32mm2 chip is fabricated in a 0.25µm standard CMOS process and consumes 350mW at 3.3V.

Biography

Bruno W. Garlepp (M’97) was born in Bahia, Brazil, in 1970. He received the B.S.E.E. degree from the University of California, Los Angeles, in 1993, and the M.S.E.E. degree from Stanford University, Stanford, CA, in 1995. In 1993, he joined the Hughes Aircraft Advanced Circuits Technology Center, Torrance, CA, where he designed high-precision analog ICs for A/D applications and RF circuits for wideband communications applications. In 1996, he joined Rambus Inc., Mountain View, CA, where he designed high-speed CMOS clocking and I/O circuits for synchronous chip-to-chip interfaces. In 2000, he joined Silicon Laboratories, Austin, TX, where he designed high performance CDR and clock synthesis ICs for SONET applications. In 2003, he returned to Rambus, Los Altos, CA, where he designs multi-GHz, multi-mode signaling interfaces for chip-to-chip communications.

Our second speaker was   Mr. Isaac Sever, M.S.E.E., B.S.E.E. & Mr. Steve Lo, M.S.E.E., B.S. (Tzero Technologies), and the topic of their presentation was ” A Dual-Antenna Phased-Array UWB Transceiver in 0.18um CMOS. “

Abstract

Given the popular adoption of WiFi among mobile computing users, wireless connectivity among multiple consumer electronics devices will soon be demanded to enable convenience and mobility. Applications such as streaming of multiple video streams require high reliability, high data rate and acceptable range. Ultra-wideband (UWB) technology offers a solution for this application. High reliability entails robustness to interference since these UWB devices will co-exist with other wireless systems. Potential out-of-band or in-band interferers due to WiFi or WiMax may have significantly higher power than the desired UWB channel. These high-level blockers will compress the receiver and degrade its sensitivity if the problem is not properly addressed.

Biography

Isaac Sever received a B.S. degree from the University of California Davis and a M.S. from the University of California Berkeley, both in Electrical Engineering. He is a member of the technical staff at Tzero Technologies, working on the radio for ultra-wideband systems. Previously he worked on WLAN transceivers at Resonext and RF Micro Devices. His research interests include radio architectures and calibrations and RF and analog circuits.

Biography

Steve Lo received the B.S. degree from Cornell University, Ithaca in 1991 and the M.S. degree in electrical engineering from University of California, Berkeley in 1996. From 1991 to 1993, he worked at Nortel in San Diego where he was engaged in the product development of subscriber-line interface cards in telephone networks. In 1996, he joined National Semiconductor in Santa Clara where he designed phase-locked loops for wireless communication. From 2000 to 2003, he held technical and management positions at Datapath Systems (subsequently LSI Logic after acquisition) in San Jose where he was involved in the design and development of silicon tuner and DVD analog front-end. Since November of 2003, he has worked at Tzero Technologies in Sunnyvale where he is currently designing RF transceivers for ultra-wideband communication.

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