Solid State Circuits Society

September 18, 2003

Our speaker was Mr. Aurangzeb Khan , and the topic of his presentation was
“Challenges in Achieving First Silicon Success for 10M-Gate SoCs: A Silicon Engineering Perspective”

This presentation focuses on sharing recent design experience in developing several industry-first System-on-Chip (SoC) ICs, as these relate to improvements in design methods (including design best practices), new design technologies, and design methodology, as well as circuit and chip electrical-design techniques. The material may be useful for designers working in silicon engineering for nanometer System-on-Chip ICs.

Aurangzeb K. Khan (S’76-M’76) received the B.Sc. degree from the University of the Punjab, Lahore, Pakistan, in physics and pure and applied mathematics, with highest academic honors, in 1975. He received B.S. degrees from the University of California, Berkeley, in electrical engineering and computer sciences and in nuclear engineering in 1978. He received the M.S. degree in electrical engineering in 1981 and the M.S. degree in engineering management in 1984, both from Stanford University, Stanford, CA.

Dr. Khan is a Corp. Vice President and General Manager of the Design Foundry at Cadence Design Systems. He was responsible for the IC design business at Simplex Solutions, Inc., Sunnyvale, CA, until its acquisition by Cadence in June 2002. In March 1999, he co-founded Altius Solutions and served as its President and CEO. Altius focused on SOC IC design. It merged with Simplex in October 2000. From February 1996 to March 1999, he was Vice President for Silicon Engineering at Cirrus Logic, Inc., where he helped develop industry-first mixed-signal SOCs, including 3CiTM (presented at the 1999 ISSCC). 3CiTM received the Innovation of the Year award and was recognized by IDC as one of the “Top 10” developments of 1998. From October 1983 to February 1996, he contributed to VLSI technology and systems technology development at Tandem Computers, Inc. (now part of Compaq), as Director of Engineering. He developed and applied novel circuit design and design methodology solutions to the NonStop Cyclone and Himalaya series of massively parallel networked servers. From January 1979 to October 1983, he designed ECL SRAMs at Fairchild Semiconductor as a Senior Circuit Design Engineer. He holds eight patents in high-speed circuit design.

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