Speaker: Stéphane Bernabé, CEA-LETI (France)
Meeting Date: Thursday, October 21, 2021
Time: Checkin via WebEx at 7:50 AM; Presentation at 8:00 AM (PDT)
Summary: Silicon Photonics (SiPh) is spreading widely as a technology for the mass manufacturing of Photonic Integrated Circuits (PICs). SiPh has increasingly become integrated into new generations of photonics modules for data centers, sensors, LiDARs, and emerging applications such as HPC, AI, and quantum computing. Each of these applications comes with specific requirements in term of packaging and reliability. This leads to the adoption of advanced packaging techniques to cope with these requirements. In this talk, we will review and analyze the current trends and how advanced packaging strategies are expected to ease electronic/photonic convergence, to manage the expectations in terms of complexity, scalability, and cost.
Bio: Stéphane Bernabé is the head of the Photonic Packaging Lab at CEA-LETI, Grenoble, France. His field of expertise is in Photonic Integrated Circuit packaging, Module integration (VCSEL and PIC), and Electronic/Photonic convergence for advanced applications of PICs. He previously led several R&D projects dealing with these topics and is currently involved in the EU-funded projects MASSTART, PIXAPP, and TINKER. He has also overseen module and packaging developments in companies Radiall and Intexys Photonics. He’’s a member of the Electronics Packaging Society (IEEE-EPS) and acts as committee member in the ESTC and ECTC conferences. He has co-authored 50 papers, 3 book chapters and holds 15 patents in the field of photonics packaging.