Speaker: Prof. Chris Bailey, University of Greenwich
Original Webinar Date: Wednesday, July 8, 2020
Cost: none
Summary: The Modeling and Simulation chapter of the Heterogeneous Integration Roadmap presents the clear need for modeling & simulation to support co-design across the die-package-board-system domains. At present electrical, thermal, and mechanical analysis is mainly undertaken separately, with electrical and recently thermal analysis undertaken for chip-design, and electrical, thermal, and mechanical analysis undertaken at the package/board and system levels by different design teams, generally using different tools. The future is a more integrated and collaborative approach, using multi-physics and machine learning tools, to address issues such as signal/power integrity, thermal management, and reliability. This webinar will detail the current state-of-the-art, challenges (such as chip-package interactions), and potential solutions to these. Several examples will be demonstrated detailing progress in modeling, simulation and characterization methodologies for multi-physics and multi-scale analysis.


Bio: Chris Bailey is President of the IEEE Electronics Packaging Society and Director of the Computational Mechanics and Reliability Group at the University of Greenwich, UK. He has a PhD in Computational Modeling and an MBA in Technology Management and has published over 300 papers on the Design and Simulation of Electronics Packaging. Chris has served on several government committees, which includes the 2014 UK Research Excellence Framework, to assess research outputs and research impact across UK universities. He is a member of the EPSRC College (UK Equivalent to the NSF in the USA); and associate editor for the IEEE Transactions of Components, Packaging, and Manufacturing Technology. He is also the chair for the modeling and simulation technical working group on the Heterogeneous Integration Roadmap.

Bio: Xuejun Fan is a Regents’ Professor of Texas State University System, and Professor at Lamar University, Beaumont, Texas. He is an IEEE Fellow, and an IEEE Distinguished Lecturer. He currently serves as a member-at-large of the IEEE Electronic Packaging Society (EPS) Board of Governors. He gained significant experience in the microelectronics industry between 1997 and 2007 at IME, Philips and Intel. He received the Outstanding Sustained Technical Contribution Award in 2017, and Exceptional Technical Achievement Award in 2011, from the IEEE Electronic Packaging Society. He is also co-chair for the modeling and simulation technical working group of the Heterogeneous Integration Roadmap.