SPONSORS: IEEE CLP of SCV; IEEE-SCV Computer and Electronics Packaging Chapters; IEEE Industry Engagement
Speaker: Gabriel Loh, Senior Fellow, Advanced Micro Devices (AMD)
Meeting Date: Tuesday, August 24, 2021
Time: Checkin via Zoom for presentation at 6:00 (PDT)
Information and to reserve: forms.gle/dnHgyqRfwjFJDzGK8
Summary: For decades, Moore’s Law has delivered the ability to integrate an exponentially increasing number of devices in the same silicon area at a roughly constant cost. This has enabled tremendous levels of integration, where the capabilities of computer systems that previously occupied entire rooms can now fit on a single integrated circuit. In recent times, the steady drum beat of Moore’s Law has started to slow down. Whereas device density historically doubled every 18-24 months, the rate of recent silicon process advancements has declined. While improvements in device scaling continue, albeit at a reduced pace, the industry is simultaneously observing increases in manufacturing costs. In response, the industry is now seeing a trend toward reversing direction on the traditional march toward more integration. Instead, multiple industry and academic groups are advocating that systems on chips (SoCs) be “disintegrated” into multiple smaller “chiplets.” This talk provides an overview of the technology challenges that motivated AMD to use chiplets, the technical solutions we developed for our products, and how we expanded the use of chiplets from individual processors to multiple product families.
Bio:Gabe Loh is a Senior Fellow in AMD Research. He received his Ph.D. and M.S. in computer science from Yale University in 2002 and 1999, respectively, and his B.Eng. in electrical engineering from Cooper Union in 1998. Gabe was also a tenured associate professor in the College of Computing at the Georgia Institute of Technology, a visiting researcher at Microsoft Research, and a senior researcher at Intel Corporation. He is a Fellow of the ACM and IEEE, recipient of ACM SIGARCH’s Maurice Wilkes Award, Hall of Fame member for the MICRO, ISCA, and HPCA conferences, (co-)inventor on over one hundred US patent applications and eighty granted patents, and a recipient of a U.S. National Science Foundation CAREER Award.
Chiplet Background Video on IEEE.tv (from Feb 2021 HIR Symposium):
“The Rise of Chiplets: The ODSA Project” (29:30) — Raja Swaminathan, Senior Fellow, AMD — end of Moore’s Law, rise of chiplets, ODSA D2D Interface, abstraction layer, reuse … and
“Chiplets on the Rise: DARPA’s CHIPS Program” (27:00) – Bapi Vinnakota, Open Compute Project Foundation — early days, DARPA, standardization, plug-and-play, open-source, new ecosystem …