Oct 16, 2008

Presenter: Prof. Michael H. Perrott, MIT  Title: High Performance Digital Fractional-N Frequency Synthesizers

Abstract:
Digital phase-locked loops provide many implementation advantages compared to their analog counterparts by avoiding large capacitors for
loop filters and the complications of designing analog-intensive components such as charge pumps. A key question, however, is whether such digital structures can support high performance applications in which low jitter and high PLL bandwidth is required? In this talk, we address this question by discussing techniques to achieve high performance digital fractional-N synthesizers, including high resolution time-to-digital conversion, digital quantization noise cancellation, and low-jitter divider structures. Measured results of a prototype will demonstrate that < 300 fs of rm jitter can be achieved with a relatively high PLL bandwidth of 500 kHz.

Biography:
Michael H. Perrott received the B.S. degree in Electrical Engineering from New Mexico State University, Las Cruces, NM in 1988, and the M.S. and Ph.D. degrees in Electrical Engineering and Computer Science from Massachusetts Institute of Technology in 1992 and 1997, respectively. From 1997 to 1998, he worked at Hewlett-Packard Laboratories in Palo Alto, CA, on high speed circuit techniques for Sigma-Delta synthesizers. In 1999, he was a visiting Assistant Professor at the Hong Kong University of Science and Technology, and taught a course on the theory and implementation of frequency synthesizers. From 1999 to 2001, he worked at Silicon Laboratories in Austin, TX, and developed circuit and signal processing techniques to achieve high performance clock and data recovery circuits. He was an Assistant and then Associate Professor in Electrical Engineering and Computer Science at the Massachusetts Institute of Technology from 2001 to 2008. He is now with SiTime, a Silicon Valley startup developing silicon timing, clock, and RF chips, which incorporate Micro Electro Mechanical Systems (MEMS) timing reference devices inside standard silicon electronic chips, eliminating the need for quartz crystals.

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Santa Clara Valley Chapter of the Solid State Circuits Society

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