Solid State Circuits Society

February 15, 2007

Our speaker was Dr. Philippe Jansen (IMEC), and the topic of his presentation was ” RF ESD Protection strategies – The design and performance trade-off challenges ”

Abstract
Emergence of extensive applications for portable electronics has fueled the rapid deployment of CMOS and BiCMOS based integrated RF front-ends. These technologies demonstrated transit frequencies well above 150 GHz, e.g., with transistors in a typical 90nm CMOS technology, and are commercially available for manufacturing. On the other hand, implementing Electrostatic Discharge (ESD) protection on these RF front-ends designs, such as Low Noise Amplifiers (LNA), is essential to ensure reliable operation. The ESD protection strategies for RF circuits reported in the literature include, but are not limited to classical diodes with power clamps, inductors with power clamp, distributed ESD protection using transmission lines or coplanar wave guides, resonant and cancellation methods and ESD-RF co-design techniques. All these techniques, except the first one, mark a paradigm shift in the ESD protection strategies specifically for high frequency circuit applications. It is also important to note that the protection strategies described above may not be useable in all cases and only a few reports show silicon validation data, especially for sub-130nm technologies. This presentation presents the results of a thorough investigation carried out on four ESD protection strategies in CMOS and BiCMOS technologies to obtain a clear understanding of the possible trade-offs in both RF and ESD design. This is achieved through design and evaluation of RF and ESD performances for a generic LNA, in which the RF pin is protected using different ESD protection approaches.

Biography
PHILIPPE JANSEN received M.Sc. and Ph. D. in electrical engineering from K.U.Leuven, Belgium in collaboration with IMEC in 1988 and 1993 respectively. He has performed a post-doctoral research at Hitachi’s Central Research Laboratory in Tokyo, Japan. Since 1994, he has worked for IMEC on various topics: advanced CMOS and BiCMOS integration, electrostatic discharge (ESD) protection and advanced packaging. Currently, his interests are in advanced BiCMOS process integration, ESD protection for RF circuits and integrated packaging research and development. Moreover, he is in charge of the IMEC business development office in the US.

Some photos from the event.

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