Solid State Circuits Society

September 21, 2006

Our speakers were  Dr. Cary Y. Yang (Santa Clara University) and Mr. Quoc Ngo , M.S.E.E., B.S.E.E. (Ph.D.E.E. program, Santa Clara University), and the topic of their presentation was ” Application of Carbon Nanofibers for On-chip Interconnect Applications. “

Abstract

In this work, we present electrical characteristics of vertically aligned carbon nanofiber (CNF) arrays for on-chip interconnect applications. The study consists of the investigation of electron transport mechanisms in these structures using low-temperature (~4K-300K) I-V measurements. The measured resistivity in CNF arrays is modeled based on known graphite a-axis (parallel to basal plane) and c-axis (perpendicular to basal plane) electron conduction mechanisms. The model is verified using high-resolution scanning transmission electron microscopy (STEM) of the CNF-metal interface. We also show that the selection of catalyst material plays a vital role in the interface characteristics of CNFs. Electrical reliability measurements are performed at different temperatures to demonstrate the robust nature of CNFs for interconnect applications. We show that carbon-based nanostructures provide a viable alternative for an electromigration-resistant interconnect material.

Biography

CARY Y. YANG received the B.S., M.S., and Ph.D. degrees in electrical engineering from the University of Pennsylvania in 1970, 1971, and 1975, respectively. For his doctoral research, he studied the electronic and optical properties of IV-VI narrow-gap semiconductors. His postdoctoral work at M.I.T. introduced him to the field of surface science, where he examined the detailed electronic structure of chemisorbed molecules on heavy transition metal surfaces. He joined NASA Ames Research Center in Moffett Field, California in 1976 and extended his chemisorption study to include surfaces of submicron metal particles. In 1983 he joined Santa Clara University and founded the Microelectronics Laboratory, for teaching and research on silicon-based devices and circuits. He currently holds the positions of Professor of Electrical Engineering, Associate Dean of Engineering, and Director of the Center for Nanostructures. His current research is on nanostructure interfaces and interconnects in electronic and biological systems. Dr. Yang has been a consultant to industry and government, and a visiting professor at Tokyo Institute of Technology, University of Tsukuba, National University of Singapore, University of Pennsylvania, University of California, San Diego, and University of California, Berkeley. He is a Fellow of IEEE and served as Santa Clara Valley Chapter Chair, Regions/Chapters Chair, Vice President, and President of the IEEE Electron Devices Society. From 2002 to 2003, he served as an elected member of the IEEE Board of Directors, representing Division I. He was an editor of the IEEE Transactions on Electron Devices, in the area of MOS devices. In 2004, he was named the recipient of the IEEE Educational Activities Board Meritorious Achievement Award in Continuing Education “for extensive and innovative contributions to the continuing education of working professionals in the field of micro/nanoelectronics”. In 2005, he was honored with the IEEE Electron Devices Society Distinguished Service Award.

Biography

QUOC NGO earned his B.S. in Electrical Engineering from Oregon State University in 2001 and his M.S. from Santa Clara University in Electrical Engineering in 2003. His Master’s research involved the development of a compact model for MOSFET gate-current. He is currently pursuing the Ph.D. degree in Electrical Engineering with the Center for Nanostructures at Santa Clara University. His primary research interest includes synthesis and modeling of carbon nanofiber on-chip interconnects. Quoc is involved in the joint development with NASA Ames Research Center of a thermal interface material for microelectronic packaging applications using carbon nanofiber arrays. His summer internships at Intel Corporation from 1997-2002 have included Yield Analysis, Defect Metrology, Back-end Integration, and Interconnect Research and Development for developmental 300mm processes. Currently he is actively collaborating with the Center for Nanotechnology, NASA Ames Research Center in an initiative to incorporate carbon nanofibers into silicon-based technology.

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