IEEE Santa Clara Valley Chapter
October 20, 2005
Our speaker is Julian Tham (Berkana Wireless), and the topic of his presentation is “A Single-Chip Quad-Band GSM/GPRS Transceiver in 0.18um Standard CMOS”
Abstract
CMOS RF has evolved from a novelty to a necessity with the mergence of all analog and digital functionality into a single chip for standards such as Bluetooth and WLAN/802.11. The stringent performance requirements associated with cellular standards such as GSM, however, has either limited the level of RF transceiver integration, or compelled the use of alternative technologies such as BiCMOS or bipolar. In this presentation, a fully integrated single-chip quad-band GSM/GPRS transceiver, fabricated in a 0.18£gm CMOS process, is described. This device integrates all the RF and analog transceiver functionality in a single-silicon substrate while meeting the performance requirements of the GSM standard. The challenges of CMOS technology are overcome by careful architectural decisions, appropriate circuit-design techniques, and self-calibrated analog circuits. Wherever possible, the availability of high-density CMOS logic is exploited by pushing the design complexity into the digital domain. The low-IF receive section achieves -110dBm sensitivity at the antenna and -15dBm IIP3. The offset PLL transmitter achieves 1.2 degrees RMS phase error, -65dBc modulation level at 400kHz offset, and -165dBc/Hz output noise level at 20MHz offset. The chip dissipates 95mA and 112mA respectively in receive and transmit modes.
Biography
J.L. Julian Tham is currently with Berkana Wireless where he is the Vice President of Engineering, RF and Mixed Signal Design. He has been instrumental in helping to bring Berkana’s family of RF CMOS Transceivers to production. Prior to joining Berkana in 2003, he held engineering design management positions at Maxim and Conexant / Rockwell, and held engineering positions at Trimble Navigation and Raytheon. Mr. Tham holds 11 patents and is recognized as an industry authority on wireless transceiver architectures for applications including 900MHz DSS, WLAN 802.11b/g/a and multiband cellular RFIC chipsets. The products he designed and developed have resulted in cumulative revenue in excess of $350 million. Mr. Tham earned an M.S. in Electrical Engineering from the University of California, Berkeley, and a B.S. in Electrical Engineering with Highest Honors from the University of California, Santa Barbara.
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