Solid State Circuits Society

This short course was presented in two parts. In the first part of the talk, David presented a the basic DRAM circuit and examined the challenges in scaling the basic DRAM circuit in future process technologies. David then discussed the impact of these scaling challenges on memory architecture development. In the second part of the talk, David talked about DRAM performance scaling trends and the emergence of the various specialized DRAM devices to address different needs – commodity (cost) focused DRAM devices, (low) power focused DRAM devices and bandwidth focused DRAM devices.

Bio:
David Wang is a Distinguished Engineer at Inphi Corporation. Currently, David is leading Inphi’s efforts to develop high capacity, high bandwidth and energy efficient memory systems for server and workstation applications. David has co-authored a book on memory systems titled “Memory Systems: Cache, DRAM, Disk”. Prior to joining Inphi in 2009, David was the lead memory systems architect for MetaRAM, working on buffered memory solutions for servers and workstations. David received his PhD from the University of Maryland in 2005, his PhD thesis is on the topic of a high-performance, power-constrained, DRAM-command scheduling algorithm.