IEEE Santa Clara Valley Chapter
Digital Analog Design: Challenges and Trends
Speaker: Mark Horowitz, Stanford University
Time: April 27th (Thursday) evening 6.30 pm-8.30pm.
This lecture was part of the SSCS Webinar Series and can be accessed by IEEE Members here.
Abstract:
The past 30 years have seen an enormous growth in the power and sophistication of digital design tools, while progress in analog tools has been much more modest. Digital tools use many abstractions to allow them to validate implementations match the functional models, and the composition of cells matches the composition of the functional models. While there are many reasons why this is more difficult for analog circuits, it can be done. To prove this point, this talk presents how to leverage the fact that the result surface of analog designs are smooth to create ways to formally validate analog models to instances, define analog fault models, and even efficiently explore the effect of process variations.
Bio:
Mark Horowitz is the Yahoo! Founders Professor at Stanford University and was chair of the Electrical Engineering Department from 2008 to 2012. He co-founded Rambus, Inc. in 1990 and is a fellow of the IEEE and the ACM and a member of the National Academy of Engineering and the American Academy of Arts and Science. Dr. Horowitz’s research interests are quite broad and span using EE and CS analysis methods to problems in molecular biology to creating new design methodologies for analog and digital VLSI circuits.
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