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[ValleyML.ai, IEEE SCV-CIS and CS] AI, ML and Storage

August 7, 2019 @ 7:00 pm - 9:00 pm PDT


Register for a free exhibit pass at https://www.flashmemorysummit.com/
Free exhibit pass provides the access to exhibits, key notes and open

Free to attend.

Hosted as a free event/open session for public as part of Flash Memory Summit.

Wednesday, August 7th: 7PM-9PM

Venue: Santa Clara Convention Center, 5001 Great America Pkwy, Santa Clara, CA.


Session Description:
This session covers how the RISC-V revolution is enabling new accelerators for machine learning (ML), the importance of the computation engines that understand the stored data, the new implementations of these computation engines at the storage edge, and a different approach than the digital logic-based computation units for artificial intelligence (AI) accelerators. This approach allows flash memory-based analog computing applications to reduce the cost and power of AI and ML accelerators. AI in its current nascent form of Artificial Narrow Intelligence is the third era of computing. The ML and AI workloads are computationally very expensive, and need radical compute, memory and storage architectures to reduce cost and power dissipation, and to enable wide-scale deployment both in the cloud and at the edge. At the same time, these architectures need to be scalable and flexible to be relevant for emerging AI and ML workloads. This seminar was organized by IEEE and ValleyML.ai, and is hosted as an FMS free event/open session. It features three talks from industry leaders who are working at the intersection of ML and AI with storage.
Intended Audience:
Data center engineers/managers; storage architects/managers; hardware and software infrastructure designers; systems engineers/analysts; engineering managers; marketing and product managers; solution providers and consultants; VARs, OEMs and system integrators.


  • 7.00 pm -7.10pm: Announcements and Speaker Introductions
  • 7.10 pm-7.40 pm: “Using RISC-V to Accelerate Machine Learning”, Dr. Zvonimir Bandić, Sr. Director of Next Generation Platform Technologies at Western Digital Corporation, Board of Directors member of RISC-V foundation, Chair of OpenCAPI foundation.
  • 7.45pm-8.15 pm: “Understanding Data at Storage Edge: An AI / ML Perspective ”, Dr. Ned Varnica, Director, Marvell Semiconductor
  • 8.20 pm -8.50pm:Analog Computing for AI/ML Using Embedded Flash”, Dr. Seung-hwan Song, CTO, and Co-Founder of Anaflash
  • 8.50pm-9pm: Wrap up and thanks to speakers


Speaker Profiles:

  • Dr. Zvonimir Bandić,
    • Sr. Director of Next Generation Platform Technologies at Western Digital Corporation, Board of Directors member of RISC-V foundation, Chair of OpenCAPI foundation
    • Zvonimir Z. Bandić is a research staff member and senior director of Next Generation Platform Technologies at Western Digital Corporation in San Jose, Calif. He received his Bachelor of Science in electrical engineering in 1994 from the University of Belgrade, Yugoslavia, and his Master of Science (1995) and PhD (1999) in applied physics from Caltech, Pasadena, in the field of novel electronic devices based on wide bandgap semiconductors. He is currently focusing on both NAND and emerging Non- Volatile Memories (PCM, ReRAM, MRAM) applications for data center storage and computing, including CPU, memory, networking and storage. He has been awarded over 50 patents in the fields of solid-state electronics, solid state disk controller technology, security architecture and storage systems and has published over 50 peer-reviewed papers. He is also Board of Directors member of RISC-V foundation. 
  • Dr. Ned Varnica,
    • Director, Marvell Semiconductor
    • Ned Varnica received the B.S. degree in Electrical Engineering in 2000 from School of Electrical Engineering, University of Belgrade, Serbia, the M.S. degree in 2001 and Ph.D. in 2005 both from Harvard University, Cambridge, Massachusetts. Since 2005 he has been with Marvell Semiconductor Inc, Santa Clara, California. He held short-term research positions at Maxtor Corporation, Shrewsbury, Massachusetts in 2002 and Lucent Bell Labs, Murray Hill, New Jersey in 2004. His research interests are in the areas of machine learning / artificial intelligence, communication theory, information theory, channel and source coding and their applications to digital data storage and communication systems. Dr. Varnica received the Best Student of the Class Award from the Department of Communications at the School of Electrical Engineering, University of Belgrade in 2000. He is a co-recipient of the 2005 IEEE Best Paper Award in Signal Processing and Coding for Data Storage. 
  • Dr. Seung-hwan Song
    • CTO, and Co-Founder of Anaflash
    • Dr. Seung-hwan Song is a CTO and Co-Founder of Anaflash (www.anaflash.com), Inc. that develops embedded flash memory based AI solution since 2017. Previously, he has held various research and development positions at HGST (acquired by WD), Seagate, Qualcomm, Broadcom, and Samsung. He received the B.S. and M.S. degrees in electrical engineering from Seoul National University, in 2004 and 2006, and the Ph. D. degree in electrical engineering (with a minor in biomedical engineering) from University of Minnesota, in 2013. Dr Song has 45+ US patents granted around SSD, NVM, and Flash memory, and has received a best paper award at IEEE ICC 2016 and a low power design contest award at IEEE ISLPED 2012

Program Chair: Dr. Kiran Gunnam, Distinguished Engineer – Machine Learning & Computer Vision

  • Dr. Gunnam is an innovative technology leader with vision and passion who effectively connects with individuals and groups. Dr. Gunnam’s breakthrough contributions are in the areas of advanced error correction systems, storage class memory systems and computer vision-based localization & navigation systems. He has helped drive organizations to become industry leaders through ground-breaking technologies. Dr. Gunnam has 75 issued patents and 100+ patent applications/invention disclosures on algorithms, architectures and real-time low-cost implementations for computing, storage and computer vision systems. He is the lead inventor/sole inventor for 90% of them. Dr. Gunnam’s patented work has been already incorporated in more than 2 billion data storage and WiFi chips and is set to continue to be incorporated in more than 500 million chips per year. 
  • Dr. Gunnam is also a key contributor to the precise localization and navigation technology commercialized for autonomous aerial refueling and space docking applications. His recent patent pending inventions on low-complexity simultaneous localization and mapping (SLAM) and 3D convolutional neural network (CNN) for object detection, tracking and classification are being commercialized for LiDAR+camera-based perception for autonomous driving and robotic systems. 
  • Dr. Gunnam received his MSEE and PhD in Computer Engineering from Texas A&M University, College Station. He is world-renowned for balance between strong analytical ability and pragmatic insight into implementation of advanced technology. He served as IEEE Distinguished Speaker and Plenary Speaker for 25+ events and international conferences and more than 3000 attendees in USA, Canada and Asia benefited from his lecture talks. He also teaches graduate level course focused on machine learning systems at Santa Clara University.


Program schedule along with speaker bios and talk abstracts can be downloaded here as a PDF:


Events photos –


IEEE Computer Society of Silicon Valley
IEEE SCV Computational Intelligence Society


Santa Clara Convention Center

5001 Great America Pkwy
Santa Clara, CA 95054 United States