CIRCUITS AND ARCHITECTURES FOR COMPUTATION WITH ULTRA-WIDE POWER-PERFORMANCE ADAPTATION 🗓

Sponsor: San Diego Section Chap,AP03/ED15/MTT17/SSC37/CAS04
Speaker: Massimo Alioto, Professor at the ECE Department of the National University of Singapore
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Meeting Date: 12/16/2020
Time: 7PM
Cost: online, its free, pls register ahead of time
Reservations: IEEE
Summary:
Wide power-performance adaptation is becoming crucial in always-on nearly real-time and energy-autonomous integrated systems that are subject to wide variability in the power availability and the performance target. Adaptation is indeed a prerequisite to assure continuous operation in spite of the widely fluctuating energy/power source (e.g., energy harvester), and to grant swift response upon the occurrence of events of interest (e.g., on-chip data analytics), while maintaining extremely low consumption in the common case. These requirements have led to the strong demand of a new breed of integrated systems having an extremely wide performance-power scalability and adaptation, beyond conventional voltage scaling or adaptive parallelism. In this talk, new techniques that drastically extend the performance-power scalability of digital circuits and architectures are presented. Silicon demonstrations of better-than-voltage-scaling adaptation to the workload are illustrated for both the data path (i.e., microarchitecture) and the clock path. Adaptation to a very wide range of energy/power availability is also discussed, presenting demonstrations of always-on systems (e.g., microcontrollers, power management units) with power down to sub-nW, and duty-cycled operation down to pW range. Several silicon demonstrations are illustrated to quantify the benefits offered by wide power-performance adaptation, and identify opportunities and challenges for the decade ahead.

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