Co-sponsored with the Power Electronics Chapter
Speaker: Francesco Carobolante, IoTissimo LLC
Meeting Date: Thursday, May 7, 2026
Time: Checkin via WebEx at 11:50 AM; Presentation at 12:00 noon (PDT)
Cost: none
Reservations: events.vtools.ieee.org/m/546237
Summary: Join us for an insightful webinar with Francesco Carobolante, founder of IoTissimo® LLC and an EPS Distinguished Lecturer, as he explores the critical challenges and innovative solutions that advanced packaging can provide to address the “Power Wall”. With over 30 years of industry experience and a tenure at Intel’s Corporate Strategy Office, Francesco will delve into the Heterogeneous Integration Roadmap (HIR) perspective on scaling high-power AI processors. This session will analyze how signal BW and energy requirements dictate the options available for architecting the package structure, including Vertical Power Delivery, integrated voltage regulators and advanced thermal management techniques. Discover how these architectural shifts are enabling the next generation of data center performance.
Bio: Francesco Carobolante is an IEEE Senior Life Member (EPS, EDS, MTTS, SSCS, PELS) and a prominent leader in the packaging and power community, serving on multiple Committees for the Heterogeneous Integration Roadmap (HIR Chapter 10), the International Network Generations Roadmap (Energy Efficiency WG), the Power Supply on Chip (PwrSoC), PwrPack and EnerHarv workshops. He is Principal & Strategic Technology Advisor at IoTissimo, where he helps global organizations and young companies develop technology and business strategies. He was previously Technology Strategist at Intel, Vice President Engineering at Qualcomm and Senior Director at Fairchild and STMicroelectronics. He authored over 95 US patents and holds MSEE degrees from both the University of Padova, Italy, and University of California, Los Angeles.
